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[dev.simd] cmd/compile: generated code from 'fix generated rules for shifts'

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this code is generated by simdgen CL 695455

Change-Id: I5afdc209a50b49d68e120130e0578e4666bf8749
Reviewed-on: https://go-review.googlesource.com/c/go/+/695475
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
This commit is contained in:
David Chase
2025-08-12 17:01:55 -04:00
parent 702ee2d51e
commit 08ab8e24a3
2 changed files with 900 additions and 1656 deletions
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180
src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
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@@ -1444,42 +1444,33 @@
(SetLoUint32x16 x y) => (VINSERTI64X4512 [0] x y)
(SetLoUint64x4 x y) => (VINSERTI128256 [0] x y)
(SetLoUint64x8 x y) => (VINSERTI64X4512 [0] x y)
(ShiftAllLeftInt16x8 x (MOVQconst [c])) => (VPSLLW128const [uint8(c)] x)
(ShiftAllLeftInt16x8 x y) => (VPSLLW128 x y)
(ShiftAllLeftInt16x16 x (MOVQconst [c])) => (VPSLLW256const [uint8(c)] x)
(ShiftAllLeftInt16x16 x y) => (VPSLLW256 x y)
(ShiftAllLeftInt16x32 x (MOVQconst [c])) => (VPSLLW512const [uint8(c)] x)
(ShiftAllLeftInt16x32 x y) => (VPSLLW512 x y)
(ShiftAllLeftInt32x4 x (MOVQconst [c])) => (VPSLLD128const [uint8(c)] x)
(ShiftAllLeftInt32x4 x y) => (VPSLLD128 x y)
(ShiftAllLeftInt32x8 x (MOVQconst [c])) => (VPSLLD256const [uint8(c)] x)
(ShiftAllLeftInt32x8 x y) => (VPSLLD256 x y)
(ShiftAllLeftInt32x16 x (MOVQconst [c])) => (VPSLLD512const [uint8(c)] x)
(ShiftAllLeftInt32x16 x y) => (VPSLLD512 x y)
(ShiftAllLeftInt64x2 x (MOVQconst [c])) => (VPSLLQ128const [uint8(c)] x)
(ShiftAllLeftInt64x2 x y) => (VPSLLQ128 x y)
(ShiftAllLeftInt64x4 x (MOVQconst [c])) => (VPSLLQ256const [uint8(c)] x)
(ShiftAllLeftInt64x4 x y) => (VPSLLQ256 x y)
(ShiftAllLeftInt64x8 x (MOVQconst [c])) => (VPSLLQ512const [uint8(c)] x)
(ShiftAllLeftInt64x8 x y) => (VPSLLQ512 x y)
(ShiftAllLeftUint16x8 x (MOVQconst [c])) => (VPSLLW128const [uint8(c)] x)
(ShiftAllLeftUint16x8 x y) => (VPSLLW128 x y)
(ShiftAllLeftUint16x16 x (MOVQconst [c])) => (VPSLLW256const [uint8(c)] x)
(ShiftAllLeftUint16x16 x y) => (VPSLLW256 x y)
(ShiftAllLeftUint16x32 x (MOVQconst [c])) => (VPSLLW512const [uint8(c)] x)
(ShiftAllLeftUint16x32 x y) => (VPSLLW512 x y)
(ShiftAllLeftUint32x4 x (MOVQconst [c])) => (VPSLLD128const [uint8(c)] x)
(ShiftAllLeftUint32x4 x y) => (VPSLLD128 x y)
(ShiftAllLeftUint32x8 x (MOVQconst [c])) => (VPSLLD256const [uint8(c)] x)
(ShiftAllLeftUint32x8 x y) => (VPSLLD256 x y)
(ShiftAllLeftUint32x16 x (MOVQconst [c])) => (VPSLLD512const [uint8(c)] x)
(ShiftAllLeftUint32x16 x y) => (VPSLLD512 x y)
(ShiftAllLeftUint64x2 x (MOVQconst [c])) => (VPSLLQ128const [uint8(c)] x)
(ShiftAllLeftUint64x2 x y) => (VPSLLQ128 x y)
(ShiftAllLeftUint64x4 x (MOVQconst [c])) => (VPSLLQ256const [uint8(c)] x)
(ShiftAllLeftUint64x4 x y) => (VPSLLQ256 x y)
(ShiftAllLeftUint64x8 x (MOVQconst [c])) => (VPSLLQ512const [uint8(c)] x)
(ShiftAllLeftUint64x8 x y) => (VPSLLQ512 x y)
(ShiftAllLeftInt16x8 ...) => (VPSLLW128 ...)
(VPSLLW128 x (MOVQconst [c])) => (VPSLLW128const [uint8(c)] x)
(ShiftAllLeftInt16x16 ...) => (VPSLLW256 ...)
(VPSLLW256 x (MOVQconst [c])) => (VPSLLW256const [uint8(c)] x)
(ShiftAllLeftInt16x32 ...) => (VPSLLW512 ...)
(VPSLLW512 x (MOVQconst [c])) => (VPSLLW512const [uint8(c)] x)
(ShiftAllLeftInt32x4 ...) => (VPSLLD128 ...)
(VPSLLD128 x (MOVQconst [c])) => (VPSLLD128const [uint8(c)] x)
(ShiftAllLeftInt32x8 ...) => (VPSLLD256 ...)
(VPSLLD256 x (MOVQconst [c])) => (VPSLLD256const [uint8(c)] x)
(ShiftAllLeftInt32x16 ...) => (VPSLLD512 ...)
(VPSLLD512 x (MOVQconst [c])) => (VPSLLD512const [uint8(c)] x)
(ShiftAllLeftInt64x2 ...) => (VPSLLQ128 ...)
(VPSLLQ128 x (MOVQconst [c])) => (VPSLLQ128const [uint8(c)] x)
(ShiftAllLeftInt64x4 ...) => (VPSLLQ256 ...)
(VPSLLQ256 x (MOVQconst [c])) => (VPSLLQ256const [uint8(c)] x)
(ShiftAllLeftInt64x8 ...) => (VPSLLQ512 ...)
(VPSLLQ512 x (MOVQconst [c])) => (VPSLLQ512const [uint8(c)] x)
(ShiftAllLeftUint16x8 ...) => (VPSLLW128 ...)
(ShiftAllLeftUint16x16 ...) => (VPSLLW256 ...)
(ShiftAllLeftUint16x32 ...) => (VPSLLW512 ...)
(ShiftAllLeftUint32x4 ...) => (VPSLLD128 ...)
(ShiftAllLeftUint32x8 ...) => (VPSLLD256 ...)
(ShiftAllLeftUint32x16 ...) => (VPSLLD512 ...)
(ShiftAllLeftUint64x2 ...) => (VPSLLQ128 ...)
(ShiftAllLeftUint64x4 ...) => (VPSLLQ256 ...)
(ShiftAllLeftUint64x8 ...) => (VPSLLQ512 ...)
(ShiftAllLeftConcatInt16x8 ...) => (VPSHLDW128 ...)
(ShiftAllLeftConcatInt16x16 ...) => (VPSHLDW256 ...)
(ShiftAllLeftConcatInt16x32 ...) => (VPSHLDW512 ...)
@@ -1516,78 +1507,60 @@
(ShiftAllLeftConcatMaskedUint64x2 [a] x y mask) => (VPSHLDQMasked128 [a] x y (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllLeftConcatMaskedUint64x4 [a] x y mask) => (VPSHLDQMasked256 [a] x y (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllLeftConcatMaskedUint64x8 [a] x y mask) => (VPSHLDQMasked512 [a] x y (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt16x8 x (MOVQconst [c]) mask) => (VPSLLWMasked128const [uint8(c)] x (VPMOVVec16x8ToM <types.TypeMask> mask))
(VPSLLWMasked128 x (MOVQconst [c]) mask) => (VPSLLWMasked128const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt16x8 x y mask) => (VPSLLWMasked128 x y (VPMOVVec16x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt16x16 x (MOVQconst [c]) mask) => (VPSLLWMasked256const [uint8(c)] x (VPMOVVec16x16ToM <types.TypeMask> mask))
(VPSLLWMasked256 x (MOVQconst [c]) mask) => (VPSLLWMasked256const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt16x16 x y mask) => (VPSLLWMasked256 x y (VPMOVVec16x16ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt16x32 x (MOVQconst [c]) mask) => (VPSLLWMasked512const [uint8(c)] x (VPMOVVec16x32ToM <types.TypeMask> mask))
(VPSLLWMasked512 x (MOVQconst [c]) mask) => (VPSLLWMasked512const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt16x32 x y mask) => (VPSLLWMasked512 x y (VPMOVVec16x32ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt32x4 x (MOVQconst [c]) mask) => (VPSLLDMasked128const [uint8(c)] x (VPMOVVec32x4ToM <types.TypeMask> mask))
(VPSLLDMasked128 x (MOVQconst [c]) mask) => (VPSLLDMasked128const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt32x4 x y mask) => (VPSLLDMasked128 x y (VPMOVVec32x4ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt32x8 x (MOVQconst [c]) mask) => (VPSLLDMasked256const [uint8(c)] x (VPMOVVec32x8ToM <types.TypeMask> mask))
(VPSLLDMasked256 x (MOVQconst [c]) mask) => (VPSLLDMasked256const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt32x8 x y mask) => (VPSLLDMasked256 x y (VPMOVVec32x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt32x16 x (MOVQconst [c]) mask) => (VPSLLDMasked512const [uint8(c)] x (VPMOVVec32x16ToM <types.TypeMask> mask))
(VPSLLDMasked512 x (MOVQconst [c]) mask) => (VPSLLDMasked512const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt32x16 x y mask) => (VPSLLDMasked512 x y (VPMOVVec32x16ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt64x2 x (MOVQconst [c]) mask) => (VPSLLQMasked128const [uint8(c)] x (VPMOVVec64x2ToM <types.TypeMask> mask))
(VPSLLQMasked128 x (MOVQconst [c]) mask) => (VPSLLQMasked128const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt64x2 x y mask) => (VPSLLQMasked128 x y (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt64x4 x (MOVQconst [c]) mask) => (VPSLLQMasked256const [uint8(c)] x (VPMOVVec64x4ToM <types.TypeMask> mask))
(VPSLLQMasked256 x (MOVQconst [c]) mask) => (VPSLLQMasked256const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt64x4 x y mask) => (VPSLLQMasked256 x y (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedInt64x8 x (MOVQconst [c]) mask) => (VPSLLQMasked512const [uint8(c)] x (VPMOVVec64x8ToM <types.TypeMask> mask))
(VPSLLQMasked512 x (MOVQconst [c]) mask) => (VPSLLQMasked512const [uint8(c)] x mask)
(ShiftAllLeftMaskedInt64x8 x y mask) => (VPSLLQMasked512 x y (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint16x8 x (MOVQconst [c]) mask) => (VPSLLWMasked128const [uint8(c)] x (VPMOVVec16x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint16x8 x y mask) => (VPSLLWMasked128 x y (VPMOVVec16x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint16x16 x (MOVQconst [c]) mask) => (VPSLLWMasked256const [uint8(c)] x (VPMOVVec16x16ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint16x16 x y mask) => (VPSLLWMasked256 x y (VPMOVVec16x16ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint16x32 x (MOVQconst [c]) mask) => (VPSLLWMasked512const [uint8(c)] x (VPMOVVec16x32ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint16x32 x y mask) => (VPSLLWMasked512 x y (VPMOVVec16x32ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint32x4 x (MOVQconst [c]) mask) => (VPSLLDMasked128const [uint8(c)] x (VPMOVVec32x4ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint32x4 x y mask) => (VPSLLDMasked128 x y (VPMOVVec32x4ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint32x8 x (MOVQconst [c]) mask) => (VPSLLDMasked256const [uint8(c)] x (VPMOVVec32x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint32x8 x y mask) => (VPSLLDMasked256 x y (VPMOVVec32x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint32x16 x (MOVQconst [c]) mask) => (VPSLLDMasked512const [uint8(c)] x (VPMOVVec32x16ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint32x16 x y mask) => (VPSLLDMasked512 x y (VPMOVVec32x16ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint64x2 x (MOVQconst [c]) mask) => (VPSLLQMasked128const [uint8(c)] x (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint64x2 x y mask) => (VPSLLQMasked128 x y (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint64x4 x (MOVQconst [c]) mask) => (VPSLLQMasked256const [uint8(c)] x (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint64x4 x y mask) => (VPSLLQMasked256 x y (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint64x8 x (MOVQconst [c]) mask) => (VPSLLQMasked512const [uint8(c)] x (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllLeftMaskedUint64x8 x y mask) => (VPSLLQMasked512 x y (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllRightInt16x8 x (MOVQconst [c])) => (VPSRAW128const [uint8(c)] x)
(ShiftAllRightInt16x8 x y) => (VPSRAW128 x y)
(ShiftAllRightInt16x16 x (MOVQconst [c])) => (VPSRAW256const [uint8(c)] x)
(ShiftAllRightInt16x16 x y) => (VPSRAW256 x y)
(ShiftAllRightInt16x32 x (MOVQconst [c])) => (VPSRAW512const [uint8(c)] x)
(ShiftAllRightInt16x32 x y) => (VPSRAW512 x y)
(ShiftAllRightInt32x4 x (MOVQconst [c])) => (VPSRAD128const [uint8(c)] x)
(ShiftAllRightInt32x4 x y) => (VPSRAD128 x y)
(ShiftAllRightInt32x8 x (MOVQconst [c])) => (VPSRAD256const [uint8(c)] x)
(ShiftAllRightInt32x8 x y) => (VPSRAD256 x y)
(ShiftAllRightInt32x16 x (MOVQconst [c])) => (VPSRAD512const [uint8(c)] x)
(ShiftAllRightInt32x16 x y) => (VPSRAD512 x y)
(ShiftAllRightInt64x2 x (MOVQconst [c])) => (VPSRAQ128const [uint8(c)] x)
(ShiftAllRightInt64x2 x y) => (VPSRAQ128 x y)
(ShiftAllRightInt64x4 x (MOVQconst [c])) => (VPSRAQ256const [uint8(c)] x)
(ShiftAllRightInt64x4 x y) => (VPSRAQ256 x y)
(ShiftAllRightInt64x8 x (MOVQconst [c])) => (VPSRAQ512const [uint8(c)] x)
(ShiftAllRightInt64x8 x y) => (VPSRAQ512 x y)
(ShiftAllRightUint16x8 x (MOVQconst [c])) => (VPSRLW128const [uint8(c)] x)
(ShiftAllRightUint16x8 x y) => (VPSRLW128 x y)
(ShiftAllRightUint16x16 x (MOVQconst [c])) => (VPSRLW256const [uint8(c)] x)
(ShiftAllRightUint16x16 x y) => (VPSRLW256 x y)
(ShiftAllRightUint16x32 x (MOVQconst [c])) => (VPSRLW512const [uint8(c)] x)
(ShiftAllRightUint16x32 x y) => (VPSRLW512 x y)
(ShiftAllRightUint32x4 x (MOVQconst [c])) => (VPSRLD128const [uint8(c)] x)
(ShiftAllRightUint32x4 x y) => (VPSRLD128 x y)
(ShiftAllRightUint32x8 x (MOVQconst [c])) => (VPSRLD256const [uint8(c)] x)
(ShiftAllRightUint32x8 x y) => (VPSRLD256 x y)
(ShiftAllRightUint32x16 x (MOVQconst [c])) => (VPSRLD512const [uint8(c)] x)
(ShiftAllRightUint32x16 x y) => (VPSRLD512 x y)
(ShiftAllRightUint64x2 x (MOVQconst [c])) => (VPSRLQ128const [uint8(c)] x)
(ShiftAllRightUint64x2 x y) => (VPSRLQ128 x y)
(ShiftAllRightUint64x4 x (MOVQconst [c])) => (VPSRLQ256const [uint8(c)] x)
(ShiftAllRightUint64x4 x y) => (VPSRLQ256 x y)
(ShiftAllRightUint64x8 x (MOVQconst [c])) => (VPSRLQ512const [uint8(c)] x)
(ShiftAllRightUint64x8 x y) => (VPSRLQ512 x y)
(ShiftAllRightInt16x8 ...) => (VPSRAW128 ...)
(VPSRAW128 x (MOVQconst [c])) => (VPSRAW128const [uint8(c)] x)
(ShiftAllRightInt16x16 ...) => (VPSRAW256 ...)
(VPSRAW256 x (MOVQconst [c])) => (VPSRAW256const [uint8(c)] x)
(ShiftAllRightInt16x32 ...) => (VPSRAW512 ...)
(VPSRAW512 x (MOVQconst [c])) => (VPSRAW512const [uint8(c)] x)
(ShiftAllRightInt32x4 ...) => (VPSRAD128 ...)
(VPSRAD128 x (MOVQconst [c])) => (VPSRAD128const [uint8(c)] x)
(ShiftAllRightInt32x8 ...) => (VPSRAD256 ...)
(VPSRAD256 x (MOVQconst [c])) => (VPSRAD256const [uint8(c)] x)
(ShiftAllRightInt32x16 ...) => (VPSRAD512 ...)
(VPSRAD512 x (MOVQconst [c])) => (VPSRAD512const [uint8(c)] x)
(ShiftAllRightInt64x2 ...) => (VPSRAQ128 ...)
(VPSRAQ128 x (MOVQconst [c])) => (VPSRAQ128const [uint8(c)] x)
(ShiftAllRightInt64x4 ...) => (VPSRAQ256 ...)
(VPSRAQ256 x (MOVQconst [c])) => (VPSRAQ256const [uint8(c)] x)
(ShiftAllRightInt64x8 ...) => (VPSRAQ512 ...)
(VPSRAQ512 x (MOVQconst [c])) => (VPSRAQ512const [uint8(c)] x)
(ShiftAllRightUint16x8 ...) => (VPSRLW128 ...)
(ShiftAllRightUint16x16 ...) => (VPSRLW256 ...)
(ShiftAllRightUint16x32 ...) => (VPSRLW512 ...)
(ShiftAllRightUint32x4 ...) => (VPSRLD128 ...)
(ShiftAllRightUint32x8 ...) => (VPSRLD256 ...)
(ShiftAllRightUint32x16 ...) => (VPSRLD512 ...)
(ShiftAllRightUint64x2 ...) => (VPSRLQ128 ...)
(ShiftAllRightUint64x4 ...) => (VPSRLQ256 ...)
(ShiftAllRightUint64x8 ...) => (VPSRLQ512 ...)
(ShiftAllRightConcatInt16x8 ...) => (VPSHRDW128 ...)
(ShiftAllRightConcatInt16x16 ...) => (VPSHRDW256 ...)
(ShiftAllRightConcatInt16x32 ...) => (VPSHRDW512 ...)
@@ -1624,41 +1597,32 @@
(ShiftAllRightConcatMaskedUint64x2 [a] x y mask) => (VPSHRDQMasked128 [a] x y (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllRightConcatMaskedUint64x4 [a] x y mask) => (VPSHRDQMasked256 [a] x y (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllRightConcatMaskedUint64x8 [a] x y mask) => (VPSHRDQMasked512 [a] x y (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt16x8 x (MOVQconst [c]) mask) => (VPSRAWMasked128const [uint8(c)] x (VPMOVVec16x8ToM <types.TypeMask> mask))
(VPSRAWMasked128 x (MOVQconst [c]) mask) => (VPSRAWMasked128const [uint8(c)] x mask)
(ShiftAllRightMaskedInt16x8 x y mask) => (VPSRAWMasked128 x y (VPMOVVec16x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt16x16 x (MOVQconst [c]) mask) => (VPSRAWMasked256const [uint8(c)] x (VPMOVVec16x16ToM <types.TypeMask> mask))
(VPSRAWMasked256 x (MOVQconst [c]) mask) => (VPSRAWMasked256const [uint8(c)] x mask)
(ShiftAllRightMaskedInt16x16 x y mask) => (VPSRAWMasked256 x y (VPMOVVec16x16ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt16x32 x (MOVQconst [c]) mask) => (VPSRAWMasked512const [uint8(c)] x (VPMOVVec16x32ToM <types.TypeMask> mask))
(VPSRAWMasked512 x (MOVQconst [c]) mask) => (VPSRAWMasked512const [uint8(c)] x mask)
(ShiftAllRightMaskedInt16x32 x y mask) => (VPSRAWMasked512 x y (VPMOVVec16x32ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt32x4 x (MOVQconst [c]) mask) => (VPSRADMasked128const [uint8(c)] x (VPMOVVec32x4ToM <types.TypeMask> mask))
(VPSRADMasked128 x (MOVQconst [c]) mask) => (VPSRADMasked128const [uint8(c)] x mask)
(ShiftAllRightMaskedInt32x4 x y mask) => (VPSRADMasked128 x y (VPMOVVec32x4ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt32x8 x (MOVQconst [c]) mask) => (VPSRADMasked256const [uint8(c)] x (VPMOVVec32x8ToM <types.TypeMask> mask))
(VPSRADMasked256 x (MOVQconst [c]) mask) => (VPSRADMasked256const [uint8(c)] x mask)
(ShiftAllRightMaskedInt32x8 x y mask) => (VPSRADMasked256 x y (VPMOVVec32x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt32x16 x (MOVQconst [c]) mask) => (VPSRADMasked512const [uint8(c)] x (VPMOVVec32x16ToM <types.TypeMask> mask))
(VPSRADMasked512 x (MOVQconst [c]) mask) => (VPSRADMasked512const [uint8(c)] x mask)
(ShiftAllRightMaskedInt32x16 x y mask) => (VPSRADMasked512 x y (VPMOVVec32x16ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt64x2 x (MOVQconst [c]) mask) => (VPSRAQMasked128const [uint8(c)] x (VPMOVVec64x2ToM <types.TypeMask> mask))
(VPSRAQMasked128 x (MOVQconst [c]) mask) => (VPSRAQMasked128const [uint8(c)] x mask)
(ShiftAllRightMaskedInt64x2 x y mask) => (VPSRAQMasked128 x y (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt64x4 x (MOVQconst [c]) mask) => (VPSRAQMasked256const [uint8(c)] x (VPMOVVec64x4ToM <types.TypeMask> mask))
(VPSRAQMasked256 x (MOVQconst [c]) mask) => (VPSRAQMasked256const [uint8(c)] x mask)
(ShiftAllRightMaskedInt64x4 x y mask) => (VPSRAQMasked256 x y (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllRightMaskedInt64x8 x (MOVQconst [c]) mask) => (VPSRAQMasked512const [uint8(c)] x (VPMOVVec64x8ToM <types.TypeMask> mask))
(VPSRAQMasked512 x (MOVQconst [c]) mask) => (VPSRAQMasked512const [uint8(c)] x mask)
(ShiftAllRightMaskedInt64x8 x y mask) => (VPSRAQMasked512 x y (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint16x8 x (MOVQconst [c]) mask) => (VPSRLWMasked128const [uint8(c)] x (VPMOVVec16x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint16x8 x y mask) => (VPSRLWMasked128 x y (VPMOVVec16x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint16x16 x (MOVQconst [c]) mask) => (VPSRLWMasked256const [uint8(c)] x (VPMOVVec16x16ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint16x16 x y mask) => (VPSRLWMasked256 x y (VPMOVVec16x16ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint16x32 x (MOVQconst [c]) mask) => (VPSRLWMasked512const [uint8(c)] x (VPMOVVec16x32ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint16x32 x y mask) => (VPSRLWMasked512 x y (VPMOVVec16x32ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint32x4 x (MOVQconst [c]) mask) => (VPSRLDMasked128const [uint8(c)] x (VPMOVVec32x4ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint32x4 x y mask) => (VPSRLDMasked128 x y (VPMOVVec32x4ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint32x8 x (MOVQconst [c]) mask) => (VPSRLDMasked256const [uint8(c)] x (VPMOVVec32x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint32x8 x y mask) => (VPSRLDMasked256 x y (VPMOVVec32x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint32x16 x (MOVQconst [c]) mask) => (VPSRLDMasked512const [uint8(c)] x (VPMOVVec32x16ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint32x16 x y mask) => (VPSRLDMasked512 x y (VPMOVVec32x16ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint64x2 x (MOVQconst [c]) mask) => (VPSRLQMasked128const [uint8(c)] x (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint64x2 x y mask) => (VPSRLQMasked128 x y (VPMOVVec64x2ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint64x4 x (MOVQconst [c]) mask) => (VPSRLQMasked256const [uint8(c)] x (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint64x4 x y mask) => (VPSRLQMasked256 x y (VPMOVVec64x4ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint64x8 x (MOVQconst [c]) mask) => (VPSRLQMasked512const [uint8(c)] x (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftAllRightMaskedUint64x8 x y mask) => (VPSRLQMasked512 x y (VPMOVVec64x8ToM <types.TypeMask> mask))
(ShiftLeftInt16x8 ...) => (VPSLLVW128 ...)
(ShiftLeftInt16x16 ...) => (VPSLLVW256 ...)

2376
src/cmd/compile/internal/ssa/rewriteAMD64.go
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