From b0526f3d87448f0401ea3f7f3a81aa9e6ab4804d Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Mon, 10 May 2021 22:48:28 +0200 Subject: [PATCH] cpu: set PPC64.IsPOWER8 for Power9 on aix MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is in line with the behavior on linux. Fixes golang/go#46040 Change-Id: I01ba1896d879425d12096ae67250d7e60beb7a99 Reviewed-on: https://go-review.googlesource.com/c/sys/+/318549 Trust: Tobias Klauser Trust: Bryan C. Mills Trust: Martin Möhrmann Run-TryBot: Tobias Klauser TryBot-Result: Go Bot Reviewed-by: Bryan C. Mills Reviewed-by: Martin Möhrmann --- cpu/cpu.go | 5 ++--- cpu/cpu_aix.go | 1 + 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/cpu.go b/cpu/cpu.go index f77701fe..abbec2d4 100644 --- a/cpu/cpu.go +++ b/cpu/cpu.go @@ -154,14 +154,13 @@ var MIPS64X struct { // For ppc64/ppc64le, it is safe to check only for ISA level starting on ISA v3.00, // since there are no optional categories. There are some exceptions that also // require kernel support to work (DARN, SCV), so there are feature bits for -// those as well. The minimum processor requirement is POWER8 (ISA 2.07). -// The struct is padded to avoid false sharing. +// those as well. The struct is padded to avoid false sharing. var PPC64 struct { _ CacheLinePad HasDARN bool // Hardware random number generator (requires kernel enablement) HasSCV bool // Syscall vectored (requires kernel enablement) IsPOWER8 bool // ISA v2.07 (POWER8) - IsPOWER9 bool // ISA v3.00 (POWER9) + IsPOWER9 bool // ISA v3.00 (POWER9), implies IsPOWER8 _ CacheLinePad } diff --git a/cpu/cpu_aix.go b/cpu/cpu_aix.go index 28b52164..8aaeef54 100644 --- a/cpu/cpu_aix.go +++ b/cpu/cpu_aix.go @@ -20,6 +20,7 @@ func archInit() { PPC64.IsPOWER8 = true } if impl&_IMPL_POWER9 != 0 { + PPC64.IsPOWER8 = true PPC64.IsPOWER9 = true }