From fb209a7c41cd8505b3b047ae14763a4d3d06fa19 Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Thu, 22 Oct 2020 18:00:54 +0200 Subject: [PATCH] cpu: refactor parsing of ARM64 registers into separate function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This will allow to re-use the implementation when adding support for netbsd/arm64 which will retreive these register values using sysctl(3). Change-Id: I2414cc4c6d1a91fff946466e4bf6d95d07f30137 Reviewed-on: https://go-review.googlesource.com/c/sys/+/264377 Trust: Tobias Klauser Run-TryBot: Tobias Klauser TryBot-Result: Go Bot Reviewed-by: Martin Möhrmann --- cpu/cpu_arm64.go | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/cpu/cpu_arm64.go b/cpu/cpu_arm64.go index 2f64d3b3..856dae33 100644 --- a/cpu/cpu_arm64.go +++ b/cpu/cpu_arm64.go @@ -64,9 +64,11 @@ func archInit() { func readARM64Registers() { Initialized = true - // ID_AA64ISAR0_EL1 - isar0 := getisar0() + parseARM64SystemRegisters(getisar0(), getisar1(), getpfr0()) +} +func parseARM64SystemRegisters(isar0, isar1, pfr0 uint64) { + // ID_AA64ISAR0_EL1 switch extractBits(isar0, 4, 7) { case 1: ARM64.HasAES = true @@ -124,8 +126,6 @@ func readARM64Registers() { } // ID_AA64ISAR1_EL1 - isar1 := getisar1() - switch extractBits(isar1, 0, 3) { case 1: ARM64.HasDCPOP = true @@ -147,8 +147,6 @@ func readARM64Registers() { } // ID_AA64PFR0_EL1 - pfr0 := getpfr0() - switch extractBits(pfr0, 16, 19) { case 0: ARM64.HasFP = true