Files
sys/cpu/cpu_arm64.s
Cherry Mui 4f4f1c6fea Revert "cpu: add HPDS, LOR, PAN detection for arm64"
This reverts CL 704075.

Reason for revert: Based on golang/go#76386, it doesn't seem to work correctly.

Fixes golang/go#76386.

Change-Id: I51ccbc8715c25c0d061d56dfbf0e8158f1207018
Reviewed-on: https://go-review.googlesource.com/c/sys/+/724160
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Auto-Submit: Cherry Mui <cherryyz@google.com>
2025-11-24 15:42:25 -08:00

36 lines
809 B
ArmAsm

// Copyright 2019 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
//go:build gc
#include "textflag.h"
// func getisar0() uint64
TEXT ·getisar0(SB),NOSPLIT,$0-8
// get Instruction Set Attributes 0 into x0
MRS ID_AA64ISAR0_EL1, R0
MOVD R0, ret+0(FP)
RET
// func getisar1() uint64
TEXT ·getisar1(SB),NOSPLIT,$0-8
// get Instruction Set Attributes 1 into x0
MRS ID_AA64ISAR1_EL1, R0
MOVD R0, ret+0(FP)
RET
// func getpfr0() uint64
TEXT ·getpfr0(SB),NOSPLIT,$0-8
// get Processor Feature Register 0 into x0
MRS ID_AA64PFR0_EL1, R0
MOVD R0, ret+0(FP)
RET
// func getzfr0() uint64
TEXT ·getzfr0(SB),NOSPLIT,$0-8
// get SVE Feature Register 0 into x0
MRS ID_AA64ZFR0_EL1, R0
MOVD R0, ret+0(FP)
RET