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15129aafc3
Use the MRS instruction with the corresponding system register instead of encoding the instructions using a WORD directive. This was missed in CL 583135. Change-Id: Ifcbbd81baa903f1da442eae2e49c06284db9c37d Reviewed-on: https://go-review.googlesource.com/c/sys/+/717681 Auto-Submit: Tobias Klauser <tobias.klauser@gmail.com> Reviewed-by: Florian Lehner <lehner.florian86@gmail.com> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: Michael Pratt <mpratt@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
43 lines
968 B
ArmAsm
43 lines
968 B
ArmAsm
// Copyright 2019 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build gc
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#include "textflag.h"
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// func getisar0() uint64
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TEXT ·getisar0(SB),NOSPLIT,$0-8
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// get Instruction Set Attributes 0 into x0
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MRS ID_AA64ISAR0_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getisar1() uint64
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TEXT ·getisar1(SB),NOSPLIT,$0-8
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// get Instruction Set Attributes 1 into x0
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MRS ID_AA64ISAR1_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getmmfr1() uint64
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TEXT ·getmmfr1(SB),NOSPLIT,$0-8
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// get Memory Model Feature Register 1 into x0
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MRS ID_AA64MMFR1_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getpfr0() uint64
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TEXT ·getpfr0(SB),NOSPLIT,$0-8
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// get Processor Feature Register 0 into x0
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MRS ID_AA64PFR0_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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// func getzfr0() uint64
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TEXT ·getzfr0(SB),NOSPLIT,$0-8
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// get SVE Feature Register 0 into x0
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MRS ID_AA64ZFR0_EL1, R0
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MOVD R0, ret+0(FP)
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RET
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