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cmd/compile: remove the NORconst op on mips{,64}
In the mips{,64} instruction sets and their extensions, there is no
NORI instruction.
Change-Id: If008442c792297d011b3d0c1e8501e62e32ab175
Reviewed-on: https://go-review.googlesource.com/c/go/+/735900
Reviewed-by: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
This commit is contained in:
committed by
abner chenc
parent
a0796d8af6
commit
514790c2b9
@@ -197,7 +197,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpMIPSANDconst,
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ssa.OpMIPSORconst,
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ssa.OpMIPSXORconst,
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ssa.OpMIPSNORconst,
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ssa.OpMIPSSLLconst,
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ssa.OpMIPSSRLconst,
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ssa.OpMIPSSRAconst,
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@@ -191,7 +191,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpMIPS64ANDconst,
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ssa.OpMIPS64ORconst,
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ssa.OpMIPS64XORconst,
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ssa.OpMIPS64NORconst,
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ssa.OpMIPS64SLLVconst,
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ssa.OpMIPS64SRLVconst,
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ssa.OpMIPS64SRAVconst,
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@@ -127,7 +127,7 @@
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(Neg(32|16|8) ...) => (NEG ...)
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(Neg(32|64)F ...) => (NEG(F|D) ...)
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(Com(32|16|8) x) => (NORconst [0] x)
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(Com(32|16|8) x) => (NOR (MOVWconst [0]) x)
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(Sqrt ...) => (SQRTD ...)
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(Sqrt32 ...) => (SQRTF ...)
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@@ -382,7 +382,7 @@
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(OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val)
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(SLLconst <typ.UInt32> [3]
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(ANDconst <typ.UInt32> [3] ptr)))
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(NORconst [0] <typ.UInt32> (SLL <typ.UInt32>
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(NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32>
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(MOVWconst [0xff]) (SLLconst <typ.UInt32> [3]
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(ANDconst <typ.UInt32> [3] ptr))))) mem)
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@@ -401,7 +401,7 @@
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(SLLconst <typ.UInt32> [3]
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(ANDconst <typ.UInt32> [3]
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(XORconst <typ.UInt32> [3] ptr))))
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(NORconst [0] <typ.UInt32> (SLL <typ.UInt32>
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(NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32>
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(MOVWconst [0xff]) (SLLconst <typ.UInt32> [3]
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(ANDconst <typ.UInt32> [3]
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(XORconst <typ.UInt32> [3] ptr)))))) mem)
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@@ -599,7 +599,6 @@
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(AND x (MOVWconst [c])) => (ANDconst [c] x)
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(OR x (MOVWconst [c])) => (ORconst [c] x)
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(XOR x (MOVWconst [c])) => (XORconst [c] x)
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(NOR x (MOVWconst [c])) => (NORconst [c] x)
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(SLL x (MOVWconst [c])) => (SLLconst x [c&31])
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(SRL x (MOVWconst [c])) => (SRLconst x [c&31])
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@@ -648,7 +647,6 @@
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(ORconst [0] x) => x
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(ORconst [-1] _) => (MOVWconst [-1])
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(XORconst [0] x) => x
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(XORconst [-1] x) => (NORconst [0] x)
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// generic constant folding
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(ADDconst [c] (MOVWconst [d])) => (MOVWconst [int32(c+d)])
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@@ -673,7 +671,6 @@
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(ORconst [c] (ORconst [d] x)) => (ORconst [c|d] x)
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(XORconst [c] (MOVWconst [d])) => (MOVWconst [c^d])
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(XORconst [c] (XORconst [d] x)) => (XORconst [c^d] x)
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(NORconst [c] (MOVWconst [d])) => (MOVWconst [^(c|d)])
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(NEG (MOVWconst [c])) => (MOVWconst [-c])
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(MOVBreg (MOVWconst [c])) => (MOVWconst [int32(int8(c))])
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(MOVBUreg (MOVWconst [c])) => (MOVWconst [int32(uint8(c))])
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@@ -433,7 +433,7 @@
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(OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val)
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(SLLVconst <typ.UInt64> [3]
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(ANDconst <typ.UInt64> [3] ptr)))
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(NORconst [0] <typ.UInt64> (SLLV <typ.UInt64>
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(NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64>
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(MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3]
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(ANDconst <typ.UInt64> [3] ptr))))) mem)
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@@ -452,7 +452,7 @@
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(SLLVconst <typ.UInt64> [3]
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(ANDconst <typ.UInt64> [3]
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(XORconst <typ.UInt64> [3] ptr))))
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(NORconst [0] <typ.UInt64> (SLLV <typ.UInt64>
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(NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64>
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(MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3]
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(ANDconst <typ.UInt64> [3]
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(XORconst <typ.UInt64> [3] ptr)))))) mem)
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@@ -668,7 +668,6 @@
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(AND x (MOVVconst [c])) && is32Bit(c) => (ANDconst [c] x)
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(OR x (MOVVconst [c])) && is32Bit(c) => (ORconst [c] x)
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(XOR x (MOVVconst [c])) && is32Bit(c) => (XORconst [c] x)
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(NOR x (MOVVconst [c])) && is32Bit(c) => (NORconst [c] x)
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(SLLV _ (MOVVconst [c])) && uint64(c)>=64 => (MOVVconst [0])
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(SRLV _ (MOVVconst [c])) && uint64(c)>=64 => (MOVVconst [0])
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@@ -711,7 +710,6 @@
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(ORconst [0] x) => x
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(ORconst [-1] _) => (MOVVconst [-1])
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(XORconst [0] x) => x
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(XORconst [-1] x) => (NORconst [0] x)
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// generic constant folding
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(ADDVconst [c] (MOVVconst [d])) => (MOVVconst [c+d])
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@@ -734,7 +732,6 @@
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(ORconst [c] (ORconst [d] x)) && is32Bit(c|d) => (ORconst [c|d] x)
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(XORconst [c] (MOVVconst [d])) => (MOVVconst [c^d])
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(XORconst [c] (XORconst [d] x)) && is32Bit(c^d) => (XORconst [c^d] x)
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(NORconst [c] (MOVVconst [d])) => (MOVVconst [^(c|d)])
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(NEGV (MOVVconst [c])) => (MOVVconst [-c])
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(MOVBreg (MOVVconst [c])) => (MOVVconst [int64(int8(c))])
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(MOVBUreg (MOVVconst [c])) => (MOVVconst [int64(uint8(c))])
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@@ -189,7 +189,6 @@ func init() {
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{name: "XOR", argLength: 2, reg: gp21, asm: "XOR", commutative: true, typ: "UInt64"}, // arg0 ^ arg1
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{name: "XORconst", argLength: 1, reg: gp11, asm: "XOR", aux: "Int64", typ: "UInt64"}, // arg0 ^ auxInt
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{name: "NOR", argLength: 2, reg: gp21, asm: "NOR", commutative: true}, // ^(arg0 | arg1)
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{name: "NORconst", argLength: 1, reg: gp11, asm: "NOR", aux: "Int64"}, // ^(arg0 | auxInt)
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{name: "NEGV", argLength: 1, reg: gp11}, // -arg0
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{name: "NEGF", argLength: 1, reg: fp11, asm: "NEGF"}, // -arg0, float32
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@@ -173,7 +173,6 @@ func init() {
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{name: "XOR", argLength: 2, reg: gp21, asm: "XOR", commutative: true, typ: "UInt32"}, // arg0 ^ arg1
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{name: "XORconst", argLength: 1, reg: gp11, asm: "XOR", aux: "Int32", typ: "UInt32"}, // arg0 ^ auxInt
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{name: "NOR", argLength: 2, reg: gp21, asm: "NOR", commutative: true}, // ^(arg0 | arg1)
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{name: "NORconst", argLength: 1, reg: gp11, asm: "NOR", aux: "Int32"}, // ^(arg0 | auxInt)
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{name: "NEG", argLength: 1, reg: gp11}, // -arg0
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{name: "NEGF", argLength: 1, reg: fp11, asm: "NEGF"}, // -arg0, float32
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@@ -4709,7 +4709,6 @@ const (
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OpMIPSXOR
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OpMIPSXORconst
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OpMIPSNOR
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OpMIPSNORconst
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OpMIPSNEG
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OpMIPSNEGF
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OpMIPSNEGD
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@@ -4825,7 +4824,6 @@ const (
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OpMIPS64XOR
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OpMIPS64XORconst
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OpMIPS64NOR
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OpMIPS64NORconst
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OpMIPS64NEGV
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OpMIPS64NEGF
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OpMIPS64NEGD
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@@ -72738,20 +72736,6 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "NORconst",
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auxType: auxInt32,
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argLen: 1,
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asm: mips.ANOR,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 469762046}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 g R31
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},
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outputs: []outputInfo{
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{0, 335544318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 R31
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},
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},
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},
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{
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name: "NEG",
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argLen: 1,
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@@ -74276,20 +74260,6 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "NORconst",
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auxType: auxInt64,
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argLen: 1,
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asm: mips.ANOR,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 234881022}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31
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},
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outputs: []outputInfo{
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{0, 167772158}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R31
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},
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},
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},
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{
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name: "NEGV",
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argLen: 1,
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@@ -333,10 +333,6 @@ func rewriteValueMIPS(v *Value) bool {
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return rewriteValueMIPS_OpMIPSMUL(v)
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case OpMIPSNEG:
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return rewriteValueMIPS_OpMIPSNEG(v)
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case OpMIPSNOR:
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return rewriteValueMIPS_OpMIPSNOR(v)
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case OpMIPSNORconst:
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return rewriteValueMIPS_OpMIPSNORconst(v)
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case OpMIPSOR:
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return rewriteValueMIPS_OpMIPSOR(v)
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case OpMIPSORconst:
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@@ -654,7 +650,7 @@ func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
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typ := &b.Func.Config.Types
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// match: (AtomicAnd8 ptr val mem)
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// cond: !config.BigEndian
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// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
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// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
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for {
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ptr := v_0
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val := v_1
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@@ -678,20 +674,21 @@ func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
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v6.AddArg(ptr)
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v5.AddArg(v6)
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v3.AddArg2(v4, v5)
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v7 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
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v7.AuxInt = int32ToAuxInt(0)
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v8 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
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v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v9.AuxInt = int32ToAuxInt(0xff)
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v8.AddArg2(v9, v5)
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v7.AddArg(v8)
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v7 := b.NewValue0(v.Pos, OpMIPSNOR, typ.UInt32)
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v8 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v8.AuxInt = int32ToAuxInt(0)
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v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
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v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v10.AuxInt = int32ToAuxInt(0xff)
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v9.AddArg2(v10, v5)
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v7.AddArg2(v8, v9)
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v2.AddArg2(v3, v7)
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v.AddArg3(v0, v2, mem)
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return true
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}
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// match: (AtomicAnd8 ptr val mem)
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// cond: config.BigEndian
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// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
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// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
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for {
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ptr := v_0
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val := v_1
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@@ -718,13 +715,14 @@ func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
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v6.AddArg(v7)
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v5.AddArg(v6)
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v3.AddArg2(v4, v5)
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v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
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v8.AuxInt = int32ToAuxInt(0)
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v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
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v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v10.AuxInt = int32ToAuxInt(0xff)
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v9.AddArg2(v10, v5)
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v8.AddArg(v9)
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v8 := b.NewValue0(v.Pos, OpMIPSNOR, typ.UInt32)
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v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v9.AuxInt = int32ToAuxInt(0)
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v10 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
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v11 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v11.AuxInt = int32ToAuxInt(0xff)
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v10.AddArg2(v11, v5)
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v8.AddArg2(v9, v10)
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v2.AddArg2(v3, v8)
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v.AddArg3(v0, v2, mem)
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return true
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@@ -869,37 +867,46 @@ func rewriteValueMIPS_OpBitLen8(v *Value) bool {
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}
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func rewriteValueMIPS_OpCom16(v *Value) bool {
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v_0 := v.Args[0]
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b := v.Block
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typ := &b.Func.Config.Types
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// match: (Com16 x)
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// result: (NORconst [0] x)
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// result: (NOR (MOVWconst [0]) x)
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for {
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x := v_0
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v.reset(OpMIPSNORconst)
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v.AuxInt = int32ToAuxInt(0)
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v.AddArg(x)
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v.reset(OpMIPSNOR)
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v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v0.AuxInt = int32ToAuxInt(0)
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v.AddArg2(v0, x)
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return true
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}
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}
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func rewriteValueMIPS_OpCom32(v *Value) bool {
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v_0 := v.Args[0]
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b := v.Block
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typ := &b.Func.Config.Types
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// match: (Com32 x)
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// result: (NORconst [0] x)
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// result: (NOR (MOVWconst [0]) x)
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for {
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x := v_0
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v.reset(OpMIPSNORconst)
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v.AuxInt = int32ToAuxInt(0)
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v.AddArg(x)
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v.reset(OpMIPSNOR)
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v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v0.AuxInt = int32ToAuxInt(0)
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v.AddArg2(v0, x)
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return true
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}
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}
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func rewriteValueMIPS_OpCom8(v *Value) bool {
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v_0 := v.Args[0]
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b := v.Block
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typ := &b.Func.Config.Types
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// match: (Com8 x)
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// result: (NORconst [0] x)
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// result: (NOR (MOVWconst [0]) x)
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for {
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x := v_0
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v.reset(OpMIPSNORconst)
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v.AuxInt = int32ToAuxInt(0)
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v.AddArg(x)
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v.reset(OpMIPSNOR)
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v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
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v0.AuxInt = int32ToAuxInt(0)
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v.AddArg2(v0, x)
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return true
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}
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}
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@@ -4273,43 +4280,6 @@ func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
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}
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return false
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}
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func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
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v_1 := v.Args[1]
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v_0 := v.Args[0]
|
||||
// match: (NOR x (MOVWconst [c]))
|
||||
// result: (NORconst [c] x)
|
||||
for {
|
||||
for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
|
||||
x := v_0
|
||||
if v_1.Op != OpMIPSMOVWconst {
|
||||
continue
|
||||
}
|
||||
c := auxIntToInt32(v_1.AuxInt)
|
||||
v.reset(OpMIPSNORconst)
|
||||
v.AuxInt = int32ToAuxInt(c)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
break
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
|
||||
v_0 := v.Args[0]
|
||||
// match: (NORconst [c] (MOVWconst [d]))
|
||||
// result: (MOVWconst [^(c|d)])
|
||||
for {
|
||||
c := auxIntToInt32(v.AuxInt)
|
||||
if v_0.Op != OpMIPSMOVWconst {
|
||||
break
|
||||
}
|
||||
d := auxIntToInt32(v_0.AuxInt)
|
||||
v.reset(OpMIPSMOVWconst)
|
||||
v.AuxInt = int32ToAuxInt(^(c | d))
|
||||
return true
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
|
||||
v_1 := v.Args[1]
|
||||
v_0 := v.Args[0]
|
||||
@@ -5046,18 +5016,6 @@ func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
|
||||
v.copyOf(x)
|
||||
return true
|
||||
}
|
||||
// match: (XORconst [-1] x)
|
||||
// result: (NORconst [0] x)
|
||||
for {
|
||||
if auxIntToInt32(v.AuxInt) != -1 {
|
||||
break
|
||||
}
|
||||
x := v_0
|
||||
v.reset(OpMIPSNORconst)
|
||||
v.AuxInt = int32ToAuxInt(0)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
// match: (XORconst [c] (MOVWconst [d]))
|
||||
// result: (MOVWconst [c^d])
|
||||
for {
|
||||
|
||||
@@ -370,10 +370,6 @@ func rewriteValueMIPS64(v *Value) bool {
|
||||
return rewriteValueMIPS64_OpMIPS64MOVWstore(v)
|
||||
case OpMIPS64NEGV:
|
||||
return rewriteValueMIPS64_OpMIPS64NEGV(v)
|
||||
case OpMIPS64NOR:
|
||||
return rewriteValueMIPS64_OpMIPS64NOR(v)
|
||||
case OpMIPS64NORconst:
|
||||
return rewriteValueMIPS64_OpMIPS64NORconst(v)
|
||||
case OpMIPS64OR:
|
||||
return rewriteValueMIPS64_OpMIPS64OR(v)
|
||||
case OpMIPS64ORconst:
|
||||
@@ -719,7 +715,7 @@ func rewriteValueMIPS64_OpAtomicAnd8(v *Value) bool {
|
||||
typ := &b.Func.Config.Types
|
||||
// match: (AtomicAnd8 ptr val mem)
|
||||
// cond: !config.BigEndian
|
||||
// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) (NORconst [0] <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))))) mem)
|
||||
// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))))) mem)
|
||||
for {
|
||||
ptr := v_0
|
||||
val := v_1
|
||||
@@ -743,20 +739,21 @@ func rewriteValueMIPS64_OpAtomicAnd8(v *Value) bool {
|
||||
v6.AddArg(ptr)
|
||||
v5.AddArg(v6)
|
||||
v3.AddArg2(v4, v5)
|
||||
v7 := b.NewValue0(v.Pos, OpMIPS64NORconst, typ.UInt64)
|
||||
v7.AuxInt = int64ToAuxInt(0)
|
||||
v8 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64)
|
||||
v9 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
|
||||
v9.AuxInt = int64ToAuxInt(0xff)
|
||||
v8.AddArg2(v9, v5)
|
||||
v7.AddArg(v8)
|
||||
v7 := b.NewValue0(v.Pos, OpMIPS64NOR, typ.UInt64)
|
||||
v8 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
|
||||
v8.AuxInt = int64ToAuxInt(0)
|
||||
v9 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64)
|
||||
v10 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
|
||||
v10.AuxInt = int64ToAuxInt(0xff)
|
||||
v9.AddArg2(v10, v5)
|
||||
v7.AddArg2(v8, v9)
|
||||
v2.AddArg2(v3, v7)
|
||||
v.AddArg3(v0, v2, mem)
|
||||
return true
|
||||
}
|
||||
// match: (AtomicAnd8 ptr val mem)
|
||||
// cond: config.BigEndian
|
||||
// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) (NORconst [0] <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))))) mem)
|
||||
// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))))) mem)
|
||||
for {
|
||||
ptr := v_0
|
||||
val := v_1
|
||||
@@ -783,13 +780,14 @@ func rewriteValueMIPS64_OpAtomicAnd8(v *Value) bool {
|
||||
v6.AddArg(v7)
|
||||
v5.AddArg(v6)
|
||||
v3.AddArg2(v4, v5)
|
||||
v8 := b.NewValue0(v.Pos, OpMIPS64NORconst, typ.UInt64)
|
||||
v8.AuxInt = int64ToAuxInt(0)
|
||||
v9 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64)
|
||||
v10 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
|
||||
v10.AuxInt = int64ToAuxInt(0xff)
|
||||
v9.AddArg2(v10, v5)
|
||||
v8.AddArg(v9)
|
||||
v8 := b.NewValue0(v.Pos, OpMIPS64NOR, typ.UInt64)
|
||||
v9 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
|
||||
v9.AuxInt = int64ToAuxInt(0)
|
||||
v10 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64)
|
||||
v11 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
|
||||
v11.AuxInt = int64ToAuxInt(0xff)
|
||||
v10.AddArg2(v11, v5)
|
||||
v8.AddArg2(v9, v10)
|
||||
v2.AddArg2(v3, v8)
|
||||
v.AddArg3(v0, v2, mem)
|
||||
return true
|
||||
@@ -4526,47 +4524,6 @@ func rewriteValueMIPS64_OpMIPS64NEGV(v *Value) bool {
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueMIPS64_OpMIPS64NOR(v *Value) bool {
|
||||
v_1 := v.Args[1]
|
||||
v_0 := v.Args[0]
|
||||
// match: (NOR x (MOVVconst [c]))
|
||||
// cond: is32Bit(c)
|
||||
// result: (NORconst [c] x)
|
||||
for {
|
||||
for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
|
||||
x := v_0
|
||||
if v_1.Op != OpMIPS64MOVVconst {
|
||||
continue
|
||||
}
|
||||
c := auxIntToInt64(v_1.AuxInt)
|
||||
if !(is32Bit(c)) {
|
||||
continue
|
||||
}
|
||||
v.reset(OpMIPS64NORconst)
|
||||
v.AuxInt = int64ToAuxInt(c)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
break
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueMIPS64_OpMIPS64NORconst(v *Value) bool {
|
||||
v_0 := v.Args[0]
|
||||
// match: (NORconst [c] (MOVVconst [d]))
|
||||
// result: (MOVVconst [^(c|d)])
|
||||
for {
|
||||
c := auxIntToInt64(v.AuxInt)
|
||||
if v_0.Op != OpMIPS64MOVVconst {
|
||||
break
|
||||
}
|
||||
d := auxIntToInt64(v_0.AuxInt)
|
||||
v.reset(OpMIPS64MOVVconst)
|
||||
v.AuxInt = int64ToAuxInt(^(c | d))
|
||||
return true
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueMIPS64_OpMIPS64OR(v *Value) bool {
|
||||
v_1 := v.Args[1]
|
||||
v_0 := v.Args[0]
|
||||
@@ -5305,18 +5262,6 @@ func rewriteValueMIPS64_OpMIPS64XORconst(v *Value) bool {
|
||||
v.copyOf(x)
|
||||
return true
|
||||
}
|
||||
// match: (XORconst [-1] x)
|
||||
// result: (NORconst [0] x)
|
||||
for {
|
||||
if auxIntToInt64(v.AuxInt) != -1 {
|
||||
break
|
||||
}
|
||||
x := v_0
|
||||
v.reset(OpMIPS64NORconst)
|
||||
v.AuxInt = int64ToAuxInt(0)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
// match: (XORconst [c] (MOVVconst [d]))
|
||||
// result: (MOVVconst [c^d])
|
||||
for {
|
||||
|
||||
Reference in New Issue
Block a user