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unix: update riscv_hwprobe constants

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Linux 6.5 enhanced the riscv_hwprobe syscall to detect four new
RISC-V extensions, V, Zba, Zbb and Zbs.  Update the hwprobe
constants in unix so these extensions can be detected by Go
programs.

Updates golang/go#61416

Change-Id: Id6b4566c5c96fe3429fad54e93d3459cb5317642
Reviewed-on: https://go-review.googlesource.com/c/sys/+/530895
Reviewed-by: Ian Lance Taylor <iant@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Than McIntosh <thanm@google.com>
Auto-Submit: Ian Lance Taylor <iant@google.com>
Reviewed-by: Tobias Klauser <tobias.klauser@gmail.com>
This commit is contained in:
Mark Ryan
2023-09-25 08:11:46 +00:00
committed by Gopher Robot
parent 71c9d8730f
commit 8858c729c9
2 changed files with 12 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
unix/linux/types.go
View File

@@ -447,6 +447,10 @@ struct my_can_bittiming_const {
#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
#define RISCV_HWPROBE_IMA_FD (1 << 0)
#define RISCV_HWPROBE_IMA_C (1 << 1)
#define RISCV_HWPROBE_IMA_V (1 << 2)
#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
@@ -5793,6 +5797,10 @@ const (
RISCV_HWPROBE_KEY_IMA_EXT_0 = C.RISCV_HWPROBE_KEY_IMA_EXT_0
RISCV_HWPROBE_IMA_FD = C.RISCV_HWPROBE_IMA_FD
RISCV_HWPROBE_IMA_C = C.RISCV_HWPROBE_IMA_C
RISCV_HWPROBE_IMA_V = C.RISCV_HWPROBE_IMA_V
RISCV_HWPROBE_EXT_ZBA = C.RISCV_HWPROBE_EXT_ZBA
RISCV_HWPROBE_EXT_ZBB = C.RISCV_HWPROBE_EXT_ZBB
RISCV_HWPROBE_EXT_ZBS = C.RISCV_HWPROBE_EXT_ZBS
RISCV_HWPROBE_KEY_CPUPERF_0 = C.RISCV_HWPROBE_KEY_CPUPERF_0
RISCV_HWPROBE_MISALIGNED_UNKNOWN = C.RISCV_HWPROBE_MISALIGNED_UNKNOWN
RISCV_HWPROBE_MISALIGNED_EMULATED = C.RISCV_HWPROBE_MISALIGNED_EMULATED

4
unix/ztypes_linux_riscv64.go
View File

@@ -733,6 +733,10 @@ const (
RISCV_HWPROBE_KEY_IMA_EXT_0 = 0x4
RISCV_HWPROBE_IMA_FD = 0x1
RISCV_HWPROBE_IMA_C = 0x2
RISCV_HWPROBE_IMA_V = 0x4
RISCV_HWPROBE_EXT_ZBA = 0x8
RISCV_HWPROBE_EXT_ZBB = 0x10
RISCV_HWPROBE_EXT_ZBS = 0x20
RISCV_HWPROBE_KEY_CPUPERF_0 = 0x5
RISCV_HWPROBE_MISALIGNED_UNKNOWN = 0x0
RISCV_HWPROBE_MISALIGNED_EMULATED = 0x1